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PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
DESCRIPTION
The M52790 is AV switch semiconductor integrated circuit with I2C bus control . This IC contains 2-channels of 4-input audio switches and 2channels of 4-input video switches. Each channel can be controled independently . The video switches contain amplifiers can be controled a gain of output 0dB or 6dB .
PIN CONFIGURATION ( TOP VIEW )
VCC VIDEO 2 IN Lch 2 IN C 2 IN Rch 2 IN Y 2 IN VIDEO 3 IN Lch 3 IN C 3 IN Rch 3 IN Y 3 IN VIDEO 4 IN Lch 4 IN C 4 IN Rch 4 IN Y 4 IN SCL SDA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
FEATURES
*Video and stereo sound switches in one package *Wide frequency range ( video switch )...........DC~20MHz *High separation ( video switch ) .................Crosstalk -60dB ( typ. ) at 1MHz *Two types of packages are provided : SDIP with a lead pitch of 1.778mm ( M52790SP ) ; and SSOP with a lead pitch of 0.8mm ( M52790FP ) .
TUNER IN Lch T IN C IN Rch T IN Y IN V 1 OUT Lch 1 OUT C 1 OUT Rch 1 OUT Y 1 OUT V 2 OUT Lch 2 OUT C 2 OUT Rch 2 OUT Y 2 OUT BIAS CHIP SELECT GND
APPLICATION
Video equipment
Outline 36P4E (Lead pitch :1.778mm)
PIN CONFIGURATION ( TOP VIEW ) RECOMMENDED OPERATING CONDITION
Supply voltage Rated supply voltage Maximum output current 4.7V ~ 9.3V 5V,9V 63mA(at 9V)
VCC VIDEO 2 IN Lch 2 IN C 2 IN Rch 2 IN Y 2 IN VIDEO 3 IN Lch 3 IN C 3 IN Rch 3 IN Y 3 IN VIDEO 4 IN Lch 4 IN C 4 IN Rch 4 IN Y 4 IN SCL SDA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
TUNER IN Lch T IN C IN Rch T IN Y IN V 1 OUT Lch 1 OUT C 1 OUT Rch 1 OUT Y 1 OUT V 2 OUT Lch 2 OUT C 2 OUT Rch 2 OUT Y 2 OUT BIAS CHIP SELECT GND
Outline 36P2R-D (Lead pitch :0.8mm)
MITSUBISHI
1-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
BLOCK DIAGRAM
VCC 1 36 2 7 12
S
V-SW1
TUNER IN VIDEO 2 IN VIDEO 3 IN VIDEO 4 IN
0/6dB
31 34
S
V-SW2
V 1 OUT C IN Y/C Sepa. Y IN
Y 2 IN Y 3 IN Y 4 IN
6 11 16
N
Y-SW1
0/6dB
32 27 Y 1 OUT
0/6dB
22
Y-SW2
Y 2 OUT V 2 OUT C 1 OUT
0/6dB
C 2 IN C 3 IN C 4 IN
4 9 14
N
C-SW1
2
26
0/6dB
29
0/6dB
24
C-SW2
C 2 OUT
Rch T IN Rch 2 IN Rch 3 IN Rch 4 IN
33 5 10 15
R-SW2 R-SW1 R-MODE1
R M L
R-MODE2
0dB
28
0dB
Rch 1 OUT
Lch T IN Lch 2 IN Lch 3 IN Lch 4 IN
35 3 8 13
L-SW2 L-SW1
R M L
L-MODE1
23
0dB
Rch 2 OUT
L M R
L-MODE2
30
0dB
Lch 1 OUT
L M R
25 18 17 20
Lch 2 OUT SDA SCL
BIAS 21
BIAS
I2C Control
19 GND
CHIP SELECT
MITSUBISHI
2-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
DESCRIPTION OF PIN
Pin No.
1 2 6 7 11 12 16 32 36 3 5 8 10 13 15 33 35 4 9 14 34
Name
Vcc VIDEO 2 IN Y 2 IN VIDEO 3 IN Y 3 IN VIDEO 4 IN Y 4 IN Y IN TUNER IN Lch 2 IN Rch 2 IN Lch 3 IN Rch 3 IN Lch 4 IN Rch 4 IN Rch T IN Lch T IN C 2 IN C 3 IN C 4 IN C IN
Peripheral circuit pins
DC voltage(V)
9V 3.6V
Remarks
5~9V Clamp in
4.7V
30K
4.7V
20K
17
SCL
VIL max.=1.5V VIH min.=3.0V
18
SDA
VIL max.=1.5V VIH min.=3.0V VOL max.=0.4V (at Iin=3mA)
MITSUBISHI
3-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
DESCRIPTION OF PIN (cont.)
Pin No.
19 20
Name
GND CHIP SELECT
Peripheral circuit pins
DC voltage(V)
Remarks
70K
SLAVE ADDRESS 0~1.5V-------90H 2.5~Vcc------92H OPEN--------90H
30K
21
BIAS
4.2V
30K
22 26 27 31
Y 2 OUT V 2 OUT Y 1 OUT V 1 OUT
5K 5K
SYNC CHIP DC=2.9V
24 29
C 2 OUT C 1 OUT
4.0V
5K
5K
23 25 28 30
Rch 2 OUT Lch 2 OUT Rch 1 OUT Lch 1 OUT
4.0V
1.5K
1.5K
15K
MITSUBISHI
4-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
I C BUS
I 2 C BUS(Inter IC BUS)is multi master bus system developed by PHILIPS . Two wires ( SDA - serial data, SCL - serial clock ) realize functions of start , stop , transferring data , synchronization and arbitration. The output stages of device connected to the bus must have an open drain or open collector in order to perform the wired-AND function .
2
SDA A MSB SCL
S P
A MSB LSB
LSB
1
2
3
4
5
6
7
8
9
1
2
9
S ; Start condition, a high to low transition of the SDA line while SCL is high P ; Stop condition, a low to high transition of the SDA line while SCL is high A ; Acknownledge Every byte put on the SDA line must be 8-bits long . Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB ) first . The data on the SDA line must be stable during the HIGH period of the clock . The HIGH or LOW state of the data line can only change when the clock signal on the SCL line is LOW .
CONTROL
This IC controls 2-channel switchs with 2-byte data ( DATA1 and DATA2 ) . SW1 is controled by DATA1 ,SW2 is controled by DATA2 .
S
SLAVE ADDRESS A
DATA1
A
DATA2
A
P
S : Start A : Acknowledge P : Stop
SLAVE ADDRESS
1 0 0 1 0 0 X 0
R/W bit Usually 0 ( W : Master transmitter transmits to slave receiver ) Possible to select 20PIN Hi:1,Lo:0 5 -9 AUG.'98
MITSUBISHI
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
Data byte format
M52790 FUNCTION TABLE S SLAVE ADDRESS SLAVE ADDRESS SLAVE ADDRESS
A
DATA(D7~D0)
A
DATA(DF~D8)
A
P
A6 1
A5 0
A4 0
A3 1
A2 0
A1
A0 0 0/1
R/W 0
DATA1(D7~D0) CONT DATA CONT VIDEO SW1 CONT DATA S/N(S:1) V-SW1 D2 D1 0 0 0 0 1 1 1 1 AUDIO SW1 CONT MODE DATA D1 D0 0 0 1 1 DATA2(DF~D8) CONT DATA CONT VIDEO SW2 CONT DATA S/N(S:1) V-SW2 DA D9 0 0 0 0 1 1 1 1 AUDIO SW2 CONT MODE DATA D9 D8 0 0 1 1
D7
D6 AUDIO MODE1
D5
D4 Y/C AMP1
D3 V AMP1
D2 S/N
D1 D0 SW1 CONT
V OUT1 D0 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 T IN V 2 IN V 3 IN V 4 IN Y/C MIX T Y/C MIX 2 Y/C MIX 3 Y/C MIX 4
OUT Y OUT1 Y IN Y IN Y IN Y IN Y IN Y 2 IN Y 3 IN Y 4 IN
C OUT1 C IN C IN C IN C IN C IN C 2 IN C 3 IN C 4 IN
AMP1 GAIN CONT. DATA AMP D4 YC AMP1 0 0dB 1 6dB AUDIO MODE1 CONT DATA D7 D6 0 0 1 1
DATA D3
AMP V AMP1 0 0dB 1 6dB
MODE 0 1 0 1 MUTE R/R L/L NORMAL
0 1 0 1
MUTE OUT Lch OUT 1 MUTE MUTE MUTE MUTE
R/R OUT Rch OUT 1 Lch OUT 1 MUTE Rch T IN MUTE Rch 2 IN MUTE Rch 3 IN MUTE Rch 4 IN
L/L OUT Rch OUT 1 Lch OUT 1 Rch T IN Lch T IN Rch 2 IN Lch 2 IN Rch 3 IN Lch 3 IN Rch 4 IN Lch 4 IN
NORMAL OUT Rch OUT 1 Lch OUT 1 Lch T IN Lch T IN Lch 2 IN Lch 2 IN Lch 3 IN Lch 3 IN Lch 4 IN Lch 4 IN
Rch OUT 1 Rch T IN Rch 2 IN Rch 3 IN Rch 4 IN
DF
DE AUDIO MODE2
DD
DC Y/C AMP2
DB V AMP2
DA S/N
D9 D8 SW2 CONT
V OUT2 D8 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 T IN V 2 IN V 3 IN V 4 IN Y/C MIX T Y/C MIX 2 Y/C MIX 3 Y/C MIX 4
OUT Y OUT2 Y IN Y 2 IN Y 3 IN Y 4 IN Y IN Y 2 IN Y 3 IN Y 4 IN
C OUT2 C IN C 2 IN C 3 IN C 4 IN C IN C 2 IN C 3 IN C 4 IN
AMP2 GAIN CONT. DATA AMP DC YC AMP2 0 0dB 1 6dB AUDIO MODE2 CONT DATA DF DE 0 0 1 1
DATA DB
AMP V AMP2 0 0dB 1 6dB
MODE 0 1 0 1 MUTE R/R L/L NORMAL
0 1 0 1
MUTE OUT Lch OUT 2 MUTE MUTE MUTE MUTE
R/R OUT Rch OUT 2 Lch OUT 2 MUTE Rch T IN MUTE Rch 2 IN MUTE Rch 3 IN MUTE Rch 4 IN
L/L OUT Rch OUT 2 Lch OUT 2 Rch T IN Lch T IN Rch 2 IN Lch 2 IN Rch 3 IN Lch 3 IN Rch 4 IN Lch 4 IN
NORMAL OUT Rch OUT 2 Lch OUT 2 Lch T IN Lch T IN Lch 2 IN Lch 2 IN Lch 3 IN Lch 3 IN Lch 4 IN Lch 4 IN
Rch OUT 2 Rch T IN Rch 2 IN Rch 3 IN Rch 4 IN
MITSUBISHI
6 -9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
(Ta=25C,Vcc=9V,unless otherwise noted) Test condition Min. 4.7 Typ. 63 54 Max. 9.3 83 71 mA Unit V
ELECTRICAL CHARACTERISTICS
Parameter Supply voltage Circuit current VIDEO Symbol Vcc Vcc=9V,Vin=0Vp-p,Rl= Icc Vcc=5V,Vin=0Vp-p,Rl=
-
f=100kHz,1Vp-p (0dB)(T V1OUT) Voltage gain G f=100kHz,1Vp-p (6dB)(T V1OUT) f=100kHz,1Vp-p (0dB)(Y V1OUT) f=100kHz,1Vp-p (6dB)(Y V1OUT) f=10MHz/100kHz,1Vp-p (0dB)(T V1OUT) Frequency characteristics F f=10MHz/100kHz,1Vp-p (6dB)(T V1OUT) f=10MHz/100kHz,1Vp-p (0dB)(Y V1OUT) f=10MHz/100kHz,1Vp-p (6dB)(Y V1OUT) Vcc=9V(0dB)(T V1OUT) Dynamic Range Vcc=5V(0dB)(T V1OUT) D Vcc=9V(0dB)(Y V1OUT) Vcc=5V(0dB)(Y V1OUT) ZIC Input impedance ZIV ZIY Crosstalk AUDIO f=1kHz ,1Vp-p (Vcc9V)(RT R1OUT) Voltage gain
Frequency characteristics
-0.5 5.5 -0.5 5.5 -2.0 -2.0 -2.0 -2.0 4 2 4 2 14 -
0 6 0 6 0 0 0 0
0.5 6.5 0.5 6.5 2.0 2.0 2.0 2.0 26 -54 dB k Vp-p dB dB
f=100kHz Maximum with distortion <1.0%
(C,C2,C3,C4) Clamp in(T,V2,V3,V4) Clamp in(Y,Y2,Y3,Y4) f=1MHz,1Vp-p T V1OUT (at V2 mode)
20 -60
CT
-0.5 -0.5 -2.0 5.5 -20 22 -
0 0 0 0.01 6.0 0 30 -90
0.5 0.5 1 0.05 20 38 -84 dB dB % Vp-p mV k dB
G F
f=1kHz ,1Vp-p (Vcc5V)(RT R1OUT) f=100kHz/1kHz , 1Vp-p(RT R1OUT) f=1kHz,2Vp-p,at 400HzHPF+30kHzLPF (RT R1OUT) f=1kHz ,Maximum with distortion<0.5% (RT R1OUT) (MODE:RT,R2,R3,R4 R1OUT ) (RT,R2,R3,R4,LT,L2,L3,L4 ) 1kHz,1Vp-p RT R1OUT(at R2 mode)
Total harmonic distortion THD
Dynamic Range
D
Output DC offset voltage VOFF
Input impedance Crosstalk
Z1 CT
MITSUBISHI
7-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
ELECTRICAL CHARACTERISTICS
Parameter Symbol I2C BUS CONTROL SIGNAL Max. input high voltage Min. input low voltage Low level output voltage(SDA) High level input current Low level input current SCL clock frequency
Time of bus must be free before a new transmission can start
(Ta=25C,Vcc=9V,unless otherwise noted) Test condition Min. Typ. Max. Unit
Hold time at start condition The low period of the clock The high period of the clock Setup time for start condition Hold time DATA Setup time DATA
Rise time of both SDA and SCL line Fall time of both SDA and SCL line
Setup time for stop condition
VIH VIL VOL IIH IIL fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tR tF tSU;STO
3.0 0.0 SDA = 3mA SDA , SCL = 4.5 V SDA , SCL = 0.4 V 0.0 -10 -10 0.0 4.7 4.0 4.7 4.0 4.7 5.0 250 4.0
-
5.0 1.5 0.4 10 10 100 1000 300 S nS S kHz A V
I 2 C BUS CONTROL SIGNAL
SDA
tBUF tR tF tHD;STA
SCL
P S
tLOW tHD;STA tHD;DAT tHIGH tSU;DAT tSU;STA tSU;STO
Sr
P
MITSUBISHI
8 -9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52790SP/FP
AV SWITCH with I2C BUS CONTROL
Application Circuit Example
0.01 100 0.47
VCC
75 0.47
1 VCC 2 VIDEO 2 IN
10
TUNER IN 36
10 75
Lch T IN 35
0.01
3 Lch 2 IN
75 0.01
C IN 34
10
4 C 2 IN
10
Rch T IN 33
0.47
Y/C Sepa.
5 Rch 2 IN
75 0.47
Y IN 32 V 1 OUT 31 Lch 1 OUT 30 C 1 OUT 29 Rch 1 OUT 28 Y 1 OUT 27 V 2 OUT 26 Lch 2 OUT 25 C 2 OUT 24 Rch 2 OUT 23 Y 2 OUT 22 BIAS 21 CHIP SELECT 20 slave address Change(VCC/GND) GND 19
75 10 75 75 75
6 Y 2 IN
75 0.47
7 VIDEO 3 IN
10
8 Lch 3 IN
75 0.01
75
9 C 3 IN
10
10 Rch 3 IN
75 0.47
75
11 Y 3 IN
75 0.47
75
75
12 VIDEO 4 IN
10
13 Lch 4 IN
75 0.01
75
14 C 4 IN
10
15 Rch 4 IN
75 0.47
75
16 Y 4 IN
10K
5V
10K
220
17 SCL
220
5V
18 SDA
Note how to use this IC Input signal with sufficient low impedance to input terminal. The capacitance of output terminal as small as possible. Set the capacitance between Vcc and GND near the pins if possible. Assign an area as large as possible for grounding. Power-on Reset The M52790 has an intermal power-on reset function that sets each control register to "0" during IC power ON. The power-on reset VTH has 2.5V.
MITSUBISHI
9-9 AUG.'98

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